In the previous post, I wrote about Wavedrom to draw chronograms from obervations, measures and notes. I was already getting slowdowns due to the size of the data (not that big) and finally got to the point it became unusable.
Instead of desperately trying to make Javascript and SVG rendering ...
2016-04-06 14:42:51 +0000 UTC View Post
Representing chronograms in Notepad started to get confusing.
While searching for a graphic editor, I discovered Wavedrom . It's a js application able to parse specially crafted JSON files to render chronograms as SVG.
The ...
2016-03-30 16:11:20 +0000 UTC View Post
Instead of trying to guess the correct timings for the fix render cycle, I wired up the logic analyzer again and spent half the day recording everything between LSPC and B1. I now have 6kB worth of notes and many chronograms.
What comes up is just a confirmation that:
* The video logic i...
2016-03-26 12:56:10 +0000 UTC View Post
Slowed down verilog work after finally breathing some fresh air.
Did some component selection, and a bit of schematic and PCB work for the test board, since it will be made. Thanks to Marshall H. for helping.
2016-03-16 03:12:04 +0000 UTC View Post...from a tilemap snapshot ;)
In the last post I was aiming at making ao68000 run at least up to the MVS checks. I actually got fed up of trying to debug a poorly documented core, so I switched to specific NeoGeo stuff instead for this month.
Since I believe this can also be seen ...
2016-03-11 00:55:42 +0000 UTC View PostThese last days consisted of blind-writing verilog with inspiration from the neogeodev wiki and MAME's source. Started hooking up the ao68000 68k CPU core yesterday, to test bus control and address decoding.
The first step will be to have the system ROM run at least up to the MVS self-checks. ...
2016-03-04 14:10:34 +0000 UTC View PostThis is a free post, nobody will be charged for this month.
Thanks to your support, I'll be able to make some CPLD boards with practical connectors to validate the definition of some of the simpler SNK chips.
I've set up the Github repository for simulation files here: